git.libre-soc.org Git - libresoc-litex.git/history

2021-06-10	Luke Kenneth Casso...	whoops spimaster (mspi0) not connected up	blob \| commitdiff \| raw
2021-06-09	Luke Kenneth Casso...	sort out PLL connection, in and out of peripheral inter...	blob \| commitdiff \| raw \| diff to current
2021-06-09	Luke Kenneth Casso...	try setting domain to "CPU"	blob \| commitdiff \| raw \| diff to current
2021-06-09	Luke Kenneth Casso...	try setting actual clk to pllclk_o	blob \| commitdiff \| raw \| diff to current
2021-06-09	Luke Kenneth Casso...	add PLL clock loop-back into CPU	blob \| commitdiff \| raw \| diff to current
2021-05-22	Luke Kenneth Casso...	match up PLL names	blob \| commitdiff \| raw \| diff to current
2021-04-18	Luke Kenneth Casso...	rename PLL pins to match LIP6.fr PLL	blob \| commitdiff \| raw \| diff to current
2021-04-18	Luke Kenneth Casso...	rename XICS memmap regions	blob \| commitdiff \| raw \| diff to current
2021-04-18	Luke Kenneth Casso...	update to build ls180 4k SRAMs	blob \| commitdiff \| raw \| diff to current
2021-04-05	Luke Kenneth Casso...	sort out sdr and sdmmc OE pad drive, no longer one...	blob \| commitdiff \| raw \| diff to current
2021-04-01	Luke Kenneth Casso...	disable PLL for litex build, new variant	blob \| commitdiff \| raw \| diff to current
2021-03-29	Luke Kenneth Casso...	must not add bus width parameter	blob \| commitdiff \| raw \| diff to current
2021-03-28	Luke Kenneth Casso...	fix issues with port direction on several pads	blob \| commitdiff \| raw \| diff to current
2021-03-27	Luke Kenneth Casso...	latest fighting with litex to get pad directions connec...	blob \| commitdiff \| raw \| diff to current
2021-03-25	Luke Kenneth Casso...	debugging ls180 litex hell	blob \| commitdiff \| raw \| diff to current
2021-03-22	Luke Kenneth Casso...	SDR pad mask output for DM	blob \| commitdiff \| raw \| diff to current
2021-03-12	Luke Kenneth Casso...	splitting out litex files from soc repo into separate...	blob \| commitdiff \| raw \| diff to current

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