projects
/
riscv-isa-sim.git
/ history
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
first ⋅ prev ⋅ next
Move cleardebint, per spec.
[riscv-isa-sim.git]
/
debug_rom
/
debug_rom.S
2016-05-24
Tim Newsome
Move cleardebint, per spec.
blob
|
commitdiff
|
raw
2016-05-23
Tim Newsome
Change DCSR bits to match spec.
blob
|
commitdiff
|
raw
|
diff to current
2016-05-23
Tim Newsome
Use fence.i in Debug ROM.
blob
|
commitdiff
|
raw
|
diff to current
2016-05-23
Tim Newsome
Add dret.
blob
|
commitdiff
|
raw
|
diff to current
2016-05-23
Tim Newsome
Implement single memory read access.
blob
|
commitdiff
|
raw
|
diff to current
2016-05-23
Tim Newsome
Exceptions in Debug Mode, stay in Debug Mode.
blob
|
commitdiff
|
raw
|
diff to current
2016-05-23
Tim Newsome
Have Debug memory kind of working again.
blob
|
commitdiff
|
raw
|
diff to current
2016-05-23
Tim Newsome
Fix race using fence.
blob
|
commitdiff
|
raw
|
diff to current
2016-05-23
Tim Newsome
Refactor how we track in-progress operations.
blob
|
commitdiff
|
raw
|
diff to current
2016-05-23
Tim Newsome
processor_t unfriends gdbserver_t.
blob
|
commitdiff
|
raw
|
diff to current
2016-05-23
Tim Newsome
Add debug_module bus device.
blob
|
commitdiff
|
raw
|
diff to current
2016-05-23
Tim Newsome
ROM -> RAM -> ROM, waiting for debug int.
blob
|
commitdiff
|
raw
|
diff to current
2016-05-23
Tim Newsome
Jump to the correct (temporary) Debug RAM address.
blob
|
commitdiff
|
raw
|
diff to current
2016-05-23
Tim Newsome
Clean up how Debug ROM is included.
blob
|
commitdiff
|
raw
|
diff to current
2016-05-23
Tim Newsome
Can jump to and execute Debug ROM.
blob
|
commitdiff
|
raw
2016-05-23
Tim Newsome
Add debug rom code.
blob
|
commitdiff
|
raw
|
diff to current
projects / riscv-isa-sim.git / history