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Make -H halt the core right out of reset.
[riscv-isa-sim.git]
/
riscv
/
execute.cc
2016-05-23
Tim Newsome
Make -H halt the core right out of reset.
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2016-05-23
Tim Newsome
Fix reading CSRs.
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2016-05-23
Tim Newsome
Single step appears to work.
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2016-05-23
Tim Newsome
Exceptions in Debug Mode, stay in Debug Mode.
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2016-05-23
Tim Newsome
gdb can attach and read the PC:
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2016-05-23
Tim Newsome
processor_t unfriends gdbserver_t.
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2016-05-23
Tim Newsome
Add debug_module bus device.
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2016-05-23
Tim Newsome
When gdb connects, jump to Debug ROM and segfault.
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2016-05-23
Tim Newsome
Gutting direct-access gdb.
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2016-05-23
Tim Newsome
Flush icache when using swbps and report to gdb.
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2016-05-23
Tim Newsome
Software breakpoints seem to work.
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2016-05-23
Tim Newsome
Looks like single step works.
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2016-05-23
Tim Newsome
Now you can halt/continue from gdb.
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2016-03-02
Andrew Waterman
Return to interactive mode after a trap
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2016-03-02
Andrew Waterman
Fix ERET serialization strategy
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2016-03-02
Andrew Waterman
WIP on priv spec v1.9
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2015-10-26
Andrew Waterman
Fix histogram for RVC
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2015-09-16
Scott Beamer
commit log now correctly prints privilege
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2015-09-12
Scott Beamer
print out current privilege level (if commit log enabled)
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2015-09-12
Scott Beamer
print out commit log (if enabled) for all privilege...
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2015-09-09
Andrew Waterman
Improve instruction fetch
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