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2020-09-11	Luke Kenneth Casson...	start on dcache test	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	missing comb +=	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	missing maybe_tlb_plrus	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	WAY_BITS not TLB_WAY_BITS	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	whoops new node not to be calculated at end	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	try to get better DTLBUpdate	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	simplify dcache pending	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	move dcache pending test to separate module	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	more error correction in dcache	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	use module for TLBUpdate	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	add brackets round if & in dcache	commit \| commitdiff \| tree
2020-09-10	Luke Kenneth Casson...	simplify read/write pte	commit \| commitdiff \| tree
2020-09-10	Luke Kenneth Casson...	eek, big sort-out of syntax errors in dcache.py, now...	commit \| commitdiff \| tree
2020-09-10	Luke Kenneth Casson...	starting on dcache syntax errors	commit \| commitdiff \| tree
2020-09-10	Luke Kenneth Casson...	add PLRU microwatt conversion	commit \| commitdiff \| tree
2020-09-10	Luke Kenneth Casson...	add function calls to construct dcache	commit \| commitdiff \| tree
2020-09-10	Luke Kenneth Casson...	correct some errors introduced in dcache.py	commit \| commitdiff \| tree
2020-09-10	Luke Kenneth Casson...	add docstring for PowerOp class	commit \| commitdiff \| tree
2020-09-09	Luke Kenneth Casson...	more laborious line-by-line checking of dcache.py conversion	commit \| commitdiff \| tree
2020-09-08	Luke Kenneth Casson...	add PowerDecoder explanation	commit \| commitdiff \| tree
2020-09-08	Luke Kenneth Casson...	bit of a mess, trying to get PowerDecode to not create...	commit \| commitdiff \| tree
2020-09-08	Luke Kenneth Casson...	subset columns for PowerDecoder - bit of a mess (done...	commit \| commitdiff \| tree
2020-09-08	Luke Kenneth Casson...	create a special subset of Decoder Record for storing...	commit \| commitdiff \| tree
2020-09-08	Luke Kenneth Casson...	pass in state into PowerDecode2, save on eqs and wires	commit \| commitdiff \| tree
2020-09-08	Luke Kenneth Casson...	give Decode2Execute1Type in core a name	commit \| commitdiff \| tree
2020-09-08	Luke Kenneth Casson...	argh, somehow EINT check got moved out of if/elif block	commit \| commitdiff \| tree
2020-09-08	Luke Kenneth Casson...	capture trap / irq conditions in flags for debug purposes	commit \| commitdiff \| tree
2020-09-08	Luke Kenneth Casson...	pass in CoreState to PowerDecoder rather than eq a...	commit \| commitdiff \| tree
2020-09-08	Luke Kenneth Casson...	whoops trap address being set in wrong Decode2ExecuteType...	commit \| commitdiff \| tree
2020-09-08	Luke Kenneth Casson...	add cxxsim option	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	use PowerDecoderSubsets for FUs, except for TRAP which...	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	add per-FU PowerDecoders. should now be subsettable	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	create eq_from function based on eq_from_execute1	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	debug print statement in eq_from_execute	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	oe_ok renamed to oe, needed in regspec_decode_read	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	add insn and fn_unit to CompLDSTOpSubset	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	add pspec and opsubsetkls to CompUnits	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	make immediate decoding optional on-demand	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	whoops spelling mistake outOut_carry not outPut_carry	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	convert mul test to use Power Decode subset	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	convert shift_rot to subset decoder	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	convert branch test to PowerDecodeSubset form	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	convert CR to PowerDecodeSubset format	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	bit of a big reorg of data structures	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	split out PowerDecode2 into PowerDecodeSubset	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	large stack of moving stuff around in dcache	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	adjust indentation of dcache_slow	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	more dcache translation	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	add start on cache_ram.vhdl to nmigen conversion	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	more dcache translation	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	allow Decode2ToExecute1Type to take an opkls argument	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	whoops truncated the mb and me fields	commit \| commitdiff \| tree
2020-09-07	Luke Kenneth Casson...	minor reorg on PowerDecoder	commit \| commitdiff \| tree
2020-09-06	Luke Kenneth Casson...	comment, nothing unusual when Trap Type is DEC	commit \| commitdiff \| tree
2020-09-06	Luke Kenneth Casson...	decoder immediate b split out to DecodeBImm	commit \| commitdiff \| tree
2020-09-06	Luke Kenneth Casson...	decoder immediate a split out to DecodeAImm	commit \| commitdiff \| tree
2020-09-06	Luke Kenneth Casson...	add row subset selector for PowerDecode.	commit \| commitdiff \| tree
2020-09-06	Luke Kenneth Casson...	add row_subset (doesnt do anything yet)	commit \| commitdiff \| tree
2020-09-06	Luke Kenneth Casson...	pass col_subset throughout PowerDecoder	commit \| commitdiff \| tree
2020-09-06	Luke Kenneth Casson...	reorganise PowerOp to be dynamic	commit \| commitdiff \| tree
2020-09-06	Luke Kenneth Casson...	reorg of PowerOp to be able to dynamically subset it	commit \| commitdiff \| tree
2020-09-06	Luke Kenneth Casson...	grr, autopep8 messing up	commit \| commitdiff \| tree
2020-09-06	Luke Kenneth Casson...	copy dec SPR into decoder cur_state	commit \| commitdiff \| tree
2020-09-06	Luke Kenneth Casson...	add reset option to Register	commit \| commitdiff \| tree
2020-09-06	Luke Kenneth Casson...	wark-wark, fast regs is binary-addressed	commit \| commitdiff \| tree
2020-09-06	Luke Kenneth Casson...	add unit test for slow SPRs (SPRG0/1)	commit \| commitdiff \| tree
2020-09-06	Luke Kenneth Casson...	minor code-munge on SPR-to-FAST mapping	commit \| commitdiff \| tree
2020-09-06	Luke Kenneth Casson...	use with subTest in spr unit test	commit \| commitdiff \| tree
2020-09-06	Luke Kenneth Casson...	redo generation of microwatt.v from litex	commit \| commitdiff \| tree
2020-09-06	Luke Kenneth Casson...	add comments for DEC / TB	commit \| commitdiff \| tree
2020-09-06	Luke Kenneth Casson...	add a DEC/TB FSM to TestIssuer	commit \| commitdiff \| tree
2020-09-06	Luke Kenneth Casson...	move DEC and TB from StateRegs to FastRegs for several...	commit \| commitdiff \| tree
2020-09-06	Luke Kenneth Casson...	add DEC SPR to CoreState and PowerDecoder, activate...	commit \| commitdiff \| tree
2020-09-06	Luke Kenneth Casson...	add DEC and TB to State regfile	commit \| commitdiff \| tree
2020-09-06	Luke Kenneth Casson...	add DEC/TB SPRs to spr pipeline	commit \| commitdiff \| tree
2020-09-05	Luke Kenneth Casson...	add comments on MSR read	commit \| commitdiff \| tree
2020-09-05	Luke Kenneth Casson...	move GPIO IRQ to 15 to match microwatt modifications	commit \| commitdiff \| tree
2020-09-05	Luke Kenneth Casson...	hmmm XICS data being asserted on wb bus for too long	commit \| commitdiff \| tree
2020-09-05	Luke Kenneth Casson...	argh missed a VHDL "&" translating to Cat	commit \| commitdiff \| tree
2020-09-05	Luke Kenneth Casson...	reduce XICS address lookup by 2 bits	commit \| commitdiff \| tree
2020-09-05	Luke Kenneth Casson...	MSR read in INSN_READ only occurs for 1 cycle	commit \| commitdiff \| tree
2020-09-05	Luke Kenneth Casson...	sync on ICP eint	commit \| commitdiff \| tree
2020-09-05	Luke Kenneth Casson...	connect XICS core irq to Decode2 eint	commit \| commitdiff \| tree
2020-09-05	Luke Kenneth Casson...	whoops, combinatorial loop on pending_priority	commit \| commitdiff \| tree
2020-09-05	Luke Kenneth Casson...	use stbcix in test	commit \| commitdiff \| tree
2020-09-05	Luke Kenneth Casson...	XICS addresses in words: divide by 4	commit \| commitdiff \| tree
2020-09-05	Luke Kenneth Casson...	whoops, ICS in litex sim needs to be 0x1000 size region	commit \| commitdiff \| tree
2020-09-05	Luke Kenneth Casson...	add lwzcix unit test	commit \| commitdiff \| tree
2020-09-05	Luke Kenneth Casson...	increase wishbone address width to 29 for xics and...	commit \| commitdiff \| tree
2020-09-05	Luke Kenneth Casson...	submodule update	commit \| commitdiff \| tree
2020-09-05	Luke Kenneth Casson...	add simple GPIO wishbone bus to litex sim.py	commit \| commitdiff \| tree
2020-09-05	Luke Kenneth Casson...	add stbcix and lwzcix to power_enum list	commit \| commitdiff \| tree
2020-09-05	Luke Kenneth Casson...	add simple GPIO peripheral to verilog TestIssuer	commit \| commitdiff \| tree
2020-09-05	Luke Kenneth Casson...	move wb read/write to separate util test library and...	commit \| commitdiff \| tree
2020-09-05	Luke Kenneth Casson...	add simple wishbone GPIO peripheral	commit \| commitdiff \| tree
2020-09-04	Luke Kenneth Casson...	add sld test with RB=64 to see what happens	commit \| commitdiff \| tree
2020-09-04	Luke Kenneth Casson...	reduce CSR data width to 8 as an experiment	commit \| commitdiff \| tree
2020-09-04	Luke Kenneth Casson...	add UART reserved IRQ @ 0	commit \| commitdiff \| tree
2020-09-04	Luke Kenneth Casson...	add XICS memory regions, shrink litex CSR memmap size...	commit \| commitdiff \| tree
2020-09-04	Luke Kenneth Casson...	adding XICS wb slave devices to litex sim	commit \| commitdiff \| tree
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