projects / riscv-isa-sim.git / history
? search:
summary | shortlog | log | commit | commitdiff | tree
first ⋅ prev ⋅ next
Update README
[riscv-isa-sim.git] / debug_rom /
2018-03-16 Andrew WatermanMerge branch 'deepsrc-b_fix_issue183' tree | commitdiff
2018-03-08 Tim NewsomeMerge pull request #177 from riscv/debug_auth tree | commitdiff
2018-03-06 Prashanth MundkurFix install of a missed header from debug_rom. tree | commitdiff
2018-03-06 Prashanth MundkurFix a missed header file in the softfloat include install. tree | commitdiff
2017-06-08 Tim NewsomeMerge pull request #110 from riscv/debug_rom_build tree | commitdiff
2017-06-08 Tim Newsome`make clean && make` works again in debug_rom tree | commitdiff
2017-05-17 Palmer DabbeltMerge remote-tracking branch 'origin/priv-1.10' tree | commitdiff
2017-05-16 Palmer DabbeltMerge remote-tracking branch 'origin/debug-0.13' into... tree | commitdiff
2017-04-18 Megan Wachsdebug: Add fence and fence.i to ensure Debug RAM is... tree | commitdiff
2017-04-18 Megan Wachsdebug: Checkpoint which somewhat works with OpenOCD... tree | commitdiff
2017-04-18 Megan Wachsdebug: move the debug_rom defines to a seperate file tree | commitdiff
2017-04-18 Megan Wachsdebug: Use more unique debug ROM names tree | commitdiff
2017-04-18 Megan Wachsdebug: Use a more practical debug ROM tree | commitdiff
2016-09-02 Tim NewsomeMerge branch 'master' into trigger tree | commitdiff
2016-09-02 Tim NewsomeRebuild debug ROM because CSR encoding changed. tree | commitdiff
2016-06-23 Andrew WatermanParameterize debug ROM contents on XLEN tree | commitdiff
2016-06-23 Andrew WatermanRemove fence.i from debug ROM tree | commitdiff
2016-06-09 Tim NewsomeFix 2 bugs in Debug ROM: (#52) tree | commitdiff
2016-06-03 Tim NewsomeDCSR cause was moved, bug debug ROM wasn't updated tree | commitdiff
2016-06-01 Andrew WatermanAdd gitignore tree | commitdiff
2016-06-01 Tim NewsomeMove sethaltnot and cleardebint. tree | commitdiff
2016-05-24 Tim NewsomeNew encoding.h for new CSR addresses. tree | commitdiff
2016-05-24 Tim NewsomeMove cleardebint, per spec. tree | commitdiff
2016-05-23 Tim NewsomeChange DCSR bits to match spec. tree | commitdiff
2016-05-23 Tim NewsomeMove debug rom link map to the right place. tree | commitdiff
2016-05-23 Tim NewsomeUse fence.i in Debug ROM. tree | commitdiff
2016-05-23 Tim NewsomeAdd dret. tree | commitdiff
2016-05-23 Tim NewsomeImplement single memory read access. tree | commitdiff
2016-05-23 Tim NewsomeExceptions in Debug Mode, stay in Debug Mode. tree | commitdiff
2016-05-23 Tim NewsomeHave Debug memory kind of working again. tree | commitdiff
2016-05-23 Tim NewsomeFix race using fence. tree | commitdiff
2016-05-23 Tim NewsomeRefactor how we track in-progress operations. tree | commitdiff
2016-05-23 Tim Newsomeprocessor_t unfriends gdbserver_t. tree | commitdiff
2016-05-23 Tim NewsomeAdd debug_module bus device. tree | commitdiff
2016-05-23 Tim NewsomeROM -> RAM -> ROM, waiting for debug int. tree | commitdiff
2016-05-23 Tim NewsomeJump to the correct (temporary) Debug RAM address. tree | commitdiff
2016-05-23 Tim NewsomeClean up how Debug ROM is included. tree | commitdiff
2016-05-23 Tim NewsomeCan jump to and execute Debug ROM. tree | commitdiff
2016-05-23 Tim NewsomeCheck in compiled debug ROM. tree | commitdiff
2016-05-23 Tim NewsomeAdd debug rom code. tree | commitdiff
Simple-V augmented version of spike