Merge pull request #156 from p12nGH/noncontiguous_harts
[riscv-isa-sim.git] / riscv / insns / fmax_s.h
2017-11-16 Andrew WatermanMerge pull request #156 from p12nGH/noncontiguous_harts
2017-10-19 Andrew WatermanFix implementation of FMIN/FMAX NaN case
2017-05-25 Andrew WatermanminNum -> minimumNumber
2017-05-17 Palmer DabbeltMerge remote-tracking branch 'origin/priv-1.10'
2017-04-17 Megan WachsMerge remote-tracking branch 'origin/priv-1.10' into...
2017-04-11 Andrew WatermanImplement new FP encoding
2017-02-07 Tim NewsomeMerge pull request #83 from bacam/gdb-protocol-fixes
2017-02-02 Andrew WatermanFor FMIN(sNaN, x) and FMIN(qNaN, qNaN), return canonica...
2016-03-02 Andrew WatermanUpgrade to latest SoftFloat
2015-04-04 Andrew WatermanSupport setting ISA/subsets with --isa flag
2013-09-27 Andrew WatermanUse WRITE_RD/WRITE_FRD macros to write registers
2011-06-20 Andrew Watermantemporary undoing of renaming
2011-06-13 Andrew Waterman[sim] renamed to riscv-isa-run
2011-03-25 Andrew Waterman[xcc,pk,opcodes,sim] updated encoding/insn names