git.libre-soc.org Git - riscv-tests.git/history - isa/macros/simplev/sv_test

2018-10-29	Luke Kenneth Casso...	add extra ld elwidth tests, add #defines for elwidths	blob \| commitdiff \| raw
2018-10-26	Luke Kenneth Casso...	add sv_add_elwidth unit test	blob \| commitdiff \| raw \| diff to current
2018-10-16	Luke Kenneth Casso...	modified VL and MVL CSRs to range from 1-XLEN rather...	blob \| commitdiff \| raw \| diff to current
2018-10-09	Luke Kenneth Casso...	alter unit tests to match change in CSR table format	blob \| commitdiff \| raw \| diff to current
2018-10-06	Luke Kenneth Casso...	add sv c_lwsp unit test	blob \| commitdiff \| raw \| diff to current
2018-10-04	Luke Kenneth Casso...	add twin-predicated sv c_mv unit test (no zeroing)	blob \| commitdiff \| raw \| diff to current
2018-10-02	Luke Kenneth Casso...	add rv64ud sv fadd test, shows flaw in loop for 3-arg...	blob \| commitdiff \| raw \| diff to current
2018-10-01	Luke Kenneth Casso...	add vector-vector sv add	blob \| commitdiff \| raw \| diff to current
2018-10-01	Luke Kenneth Casso...	add sv addi predicated unit test, including inversion...	blob \| commitdiff \| raw \| diff to current
2018-10-01	Luke Kenneth Casso...	augment sv_addi test using macros	blob \| commitdiff \| raw \| diff to current
2018-10-01	Luke Kenneth Casso...	add first unit test for simple-v	blob \| commitdiff \| raw \| diff to current