Fix multicore debug.
authorTim Newsome <tim@sifive.com>
Mon, 7 Aug 2017 18:21:58 +0000 (11:21 -0700)
committerTim Newsome <tim@sifive.com>
Mon, 7 Aug 2017 18:21:58 +0000 (11:21 -0700)
commit4f8b6a69484bd901f213d9a73ea29d26c8022dfd
tree75407b6379802c0437771f1df1a7acff28505d02
parenta327416eac285f50dcbb04e8ddf89204c66ece02
Fix multicore debug.

In an older implementation I was thinking of having different entry
points for different harts, but that's no longer true.

Also get rid of a bunch of trailing whitespace.
riscv/debug_module.cc
riscv/processor.cc
riscv/processor.h