| 2017-08-07 |
Tim Newsome | Fix multicore debug. |
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| 2017-05-17 |
Palmer Dabbelt | Merge remote-tracking branch 'origin/priv-1.10' |
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| 2017-05-16 |
Palmer Dabbelt | Merge remote-tracking branch 'origin/debug-0.13' into... |
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| 2017-05-15 |
Megan Wachs | Merge branch 'debug-0.13' into HEAD |
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| 2017-05-05 |
Andrew Waterman | UXL=SXL=MXL |
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| 2017-04-26 |
Palmer Dabbelt | Merge pull request #96 from riscv/ndmreset |
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| 2017-04-26 |
Palmer Dabbelt | Remove a debugging printf |
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| 2017-04-18 |
Megan Wachs | debug: Checkpoint which somewhat works with OpenOCD... |
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| 2017-04-18 |
Megan Wachs | debug: Move things around, but addresses now conflict... |
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| 2017-04-17 |
Megan Wachs | Merge remote-tracking branch 'origin/priv-1.10' into... |
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| 2017-04-08 |
Andrew Waterman | Implement vectored interrupt proposal |
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| 2017-03-28 |
Andrew Waterman | Set badaddr=0 on illegal instruction traps |
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| 2017-03-21 |
Wesley W. Terpstra | riscv: remove dependency on num_cores |
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| 2017-03-20 |
Andrew Waterman | PUM -> SUM; expose MXR to S-mode |
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| 2017-03-16 |
Andrew Waterman | Simplify interrupt-stack discipline |
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| 2017-03-13 |
Andrew Waterman | Implement mstatus.TW, mstatus.TVM, and mstatus.TSR |
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| 2017-02-27 |
Andrew Waterman | Sv57 and Sv64 are not spec'd yet |
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| 2017-02-25 |
Andrew Waterman | New counter enable scheme |
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| 2017-02-23 |
Tim Newsome | Implement halt request. |
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| 2017-02-21 |
Andrew Waterman | Take M-mode interrupts over S-mode interrupts |
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| 2017-02-21 |
Andrew Waterman | permit MMIO loads to MSIP bit |
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| 2017-02-18 |
Andrew Waterman | Spike uarch needs TLB flush after SPTBR write |
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| 2017-02-18 |
Tim Newsome | Compress log output of jump-to-self loops. |
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| 2017-02-13 |
Tim Newsome | Abstract register read mostly working. |
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| 2017-02-11 |
Tim Newsome | Entering debug mode now jumps to "dynamic rom" |
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| 2017-02-10 |
Tim Newsome | Remove gdbserver support. |
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| 2017-02-08 |
Andrew Waterman | Encode VM type in sptbr, not mstatus |
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| 2017-02-07 |
Tim Newsome | Merge pull request #83 from bacam/gdb-protocol-fixes |
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| 2017-02-03 |
Andrew Waterman | Fix interrupt delegation for coprocessors |
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| 2017-01-08 |
Andrew Waterman | Only allow SIP.SSIP to be toggled if the interrupt... |
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| 2017-01-08 |
Andrew Waterman | Make SIP.STIP read-only |
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| 2016-10-10 |
Andrew Waterman | Don't force load trigger timing to After |
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| 2016-09-29 |
Tim Newsome | Update trigger behavior. (#70) |
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| 2016-09-10 |
Andrew Waterman | allow MAFDC bits in MISA to be modified |
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| 2016-09-02 |
Andrew Waterman | Merge pull request #62 from riscv/trigger |
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| 2016-09-02 |
Tim Newsome | Merge branch 'master' into trigger |
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| 2016-09-01 |
Tim Newsome | Theoretically support trigger timing. |
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| 2016-08-31 |
Tim Newsome | Rename tdata[0-2] to tdata[1-3]. |
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| 2016-08-29 |
Tim Newsome | Rename tdata0--tdata2 to tdata1--tdata3. |
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| 2016-08-27 |
Andrew Waterman | Add (degenerate) performance counter facility |
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| 2016-08-26 |
Andrew Waterman | Allow reads from tdrdata registers |
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| 2016-08-26 |
Andrew Waterman | partially update spike to newer debug spec |
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| 2016-08-26 |
Andrew Waterman | Fix spike interactive (-d) mode |
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| 2016-08-23 |
Andrew Waterman | remove HWBPCOUNT field of DCSR |
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| 2016-08-22 |
Tim Newsome | Implement address and data triggers. |
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| 2016-08-17 |
Andrew Waterman | Allow mstatus.MPP to store bad values; instead, validat... |
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| 2016-07-28 |
Tim Newsome | Add support for virtual priv register. (#59) |
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| 2016-07-22 |
Andrew Waterman | Set U bit in misa register |
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| 2016-07-12 |
Andrew Waterman | Don't treat RVC NOP as illegal instruction |
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| 2016-07-06 |
Andrew Waterman | Update to new PTE format |
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| 2016-06-29 |
Andrew Waterman | Disassemble RVC instructions based on XLEN |
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| 2016-06-23 |
Andrew Waterman | Remove legacy HTIF; implement HTIF directly |
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| 2016-06-23 |
Andrew Waterman | Fix paddr_bits computation prior to VM setup |
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| 2016-06-18 |
Andrew Waterman | Merge sasid into sptbr |
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| 2016-06-09 |
Andrew Waterman | Trap on tdrdata registers when tdrselect[XLEN-1]=0 |
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| 2016-06-09 |
Andrew Waterman | Add degenerate HW breakpoint implementation |
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| 2016-05-23 |
Tim Newsome | Turn off debugging. |
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| 2016-05-23 |
Tim Newsome | Tell gdb we can handle large packets. |
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| 2016-05-23 |
Tim Newsome | Exceptions in Debug Mode don't update any regs. |
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| 2016-05-23 |
Tim Newsome | Remove already-implemented TODO. |
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| 2016-05-23 |
Tim Newsome | Implement ebreak[mhsu]. |
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| 2016-05-23 |
Tim Newsome | Remove dependency on include file in my homedir. |
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| 2016-05-23 |
Tim Newsome | Make -H halt the core right out of reset. |
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| 2016-05-23 |
Tim Newsome | Halt when gdb user hits ^C. |
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| 2016-05-23 |
Tim Newsome | Single step appears to work. |
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| 2016-05-23 |
Tim Newsome | Fix off-by-two in general read registers. |
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| 2016-05-23 |
Tim Newsome | Remove unused code. |
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| 2016-05-23 |
Tim Newsome | Add dret. |
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| 2016-05-23 |
Tim Newsome | Implement single memory read access. |
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| 2016-05-23 |
Tim Newsome | Exceptions in Debug Mode, stay in Debug Mode. |
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| 2016-05-23 |
Tim Newsome | Continue works well enough for DebugTest.test_exit |
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| 2016-05-23 |
Tim Newsome | Refactor how we track in-progress operations. |
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| 2016-05-23 |
Tim Newsome | processor_t unfriends gdbserver_t. |
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| 2016-05-23 |
Tim Newsome | Add debug_module bus device. |
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| 2016-05-23 |
Tim Newsome | Can jump to and execute Debug ROM. |
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| 2016-05-23 |
Tim Newsome | When gdb connects, jump to Debug ROM and segfault. |
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| 2016-05-23 |
Tim Newsome | Gutting direct-access gdb. |
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| 2016-05-23 |
Tim Newsome | Add writing to DCSR, DPC, DSCRATCH. |
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| 2016-05-23 |
Tim Newsome | Only halt on ebreak if a debugger is attached. |
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| 2016-05-23 |
Tim Newsome | Flush icache when using swbps and report to gdb. |
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| 2016-05-23 |
Tim Newsome | Software breakpoints seem to work. |
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| 2016-05-23 |
Tim Newsome | Looks like single step works. |
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| 2016-05-23 |
Tim Newsome | Now you can halt/continue from gdb. |
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| 2016-05-22 |
Andrew Waterman | Allow delegation of device interrupts |
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| 2016-05-02 |
Andrew Waterman | Add back IPI support |
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| 2016-05-02 |
Andrew Waterman | Remove MIPI; mip.MSIP bit is read-only |
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| 2016-05-02 |
Andrew Waterman | Remove tohost/fromhost registers |
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| 2016-05-01 |
Andrew Waterman | Initialize mtvec to DEFAULT_MTVEC |
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| 2016-05-01 |
Andrew Waterman | Remove SCRs; add padding after config string |
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| 2016-04-29 |
Andrew Waterman | Move much closer to new platform-M memory map |
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| 2016-04-28 |
Andrew Waterman | Remove MTIME[CMP]; add RTC device |
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| 2016-04-06 |
Andrew Waterman | Remove non-standard uarch CSRs |
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| 2016-03-17 |
Andrew Waterman | Update definition of base field in misa register |
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| 2016-03-04 |
Andrew Waterman | Fix up interrupt delegation |
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| 2016-03-02 |
Andrew Waterman | Add counter-enable registers |
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| 2016-03-02 |
Andrew Waterman | WIP on priv spec v1.9 |
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| 2016-03-02 |
Andrew Waterman | New definitions of misa/marchid/mvendorid |
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| 2016-03-02 |
Andrew Waterman | implement PUM functionality |
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| 2016-03-02 |
Andrew Waterman | sptbr now a holds a PPN, not an address |
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| 2016-03-02 |
Andrew Waterman | Use simpler MTVEC scheme |
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