2019-06-27 |
Luke Kenneth Casso... | rename SV CSRs, to use CSR_UESVSTATE etc. |
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2019-06-27 |
Luke Kenneth Casso... | add subvl to headers, comment out state-cfg |
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2018-11-13 |
Luke Kenneth Casso... | redo SV CSRs to use a stack-based mechanism |
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2018-11-03 |
Luke Kenneth Casso... | add remap and shape sv csrs |
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2018-10-16 |
Luke Kenneth Casso... | shuffle CSR offsets around, offset VL and MVL by one |
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2018-10-05 |
Luke Kenneth Casso... | add srcoffs and destoffs sv state, alter CSRs |
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2018-09-29 |
Luke Kenneth Casso... | a LOT of debugging and fixing, sv loop actually working |
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2018-09-29 |
Luke Kenneth Casso... | move SV CSRs to user-read-write |
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2018-09-29 |
Luke Kenneth Casso... | add 8 CSRs for registers and predication each |
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2018-09-29 |
Luke Kenneth Casso... | whoops dont need separate SVSETVL/SVGETVL CSRs |
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2018-09-29 |
Luke Kenneth Casso... | revert addition of svsetvl as an actual opcode, add... |
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2018-09-29 |
Luke Kenneth Casso... | Revert "sv setvl as a csr not going to work, add getvl... |
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2018-09-29 |
Luke Kenneth Casso... | Revert "manually add svsetvl instruction" |
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2018-09-28 |
Luke Kenneth Casso... | manually add svsetvl instruction |
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2018-09-28 |
Luke Kenneth Casso... | sv setvl as a csr not going to work, add getvl only |
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2018-09-27 |
Luke Kenneth Casso... | adding sv vector length CSR to processor state, and... |
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2017-11-27 |
Andrew Waterman | Rename badaddr to tval |
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2017-11-27 |
Andrew Waterman | Rename sptbr to satp |
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2017-05-17 |
Palmer Dabbelt | Merge remote-tracking branch 'origin/priv-1.10' |
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2017-05-16 |
Palmer Dabbelt | Merge remote-tracking branch 'origin/debug-0.13' into... |
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2017-05-05 |
Andrew Waterman | UXL=SXL=MXL |
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2017-04-25 |
Andrew Waterman | FMV.X.S/FMV.S.X -> FMV.X.W/FMV.W.X |
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2017-04-25 |
Andrew Waterman | Remove hret instruction |
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2017-04-17 |
Megan Wachs | Merge remote-tracking branch 'origin/priv-1.10' into... |
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2017-04-01 |
Yunsup Lee | update encoding.h to get PMP updates |
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2017-03-27 |
Andrew Waterman | Separate page faults from physical memory access exceptions |
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2017-03-23 |
Andrew Waterman | Require little-endian host |
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2017-03-22 |
Wesley W. Terpstra | riscv: replace rtc device with a real clint implementation |
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2017-03-21 |
Wesley W. Terpstra | riscv: remove dependency on num_cores |
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2017-03-20 |
Andrew Waterman | PUM -> SUM; expose MXR to S-mode |
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2017-03-16 |
Andrew Waterman | Simplify interrupt-stack discipline |
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2017-03-13 |
Andrew Waterman | Implement mstatus.TW, mstatus.TVM, and mstatus.TSR |
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2017-02-27 |
Andrew Waterman | Sv57 and Sv64 are not spec'd yet |
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2017-02-25 |
Andrew Waterman | New counter enable scheme |
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2017-02-18 |
Andrew Waterman | Spike uarch needs TLB flush after SPTBR write |
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2017-02-15 |
Andrew Waterman | sfence.vm -> sfence.vma |
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2017-02-08 |
Andrew Waterman | Encode VM type in sptbr, not mstatus |
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2016-09-02 |
Tim Newsome | Merge branch 'master' into trigger |
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2016-08-29 |
Tim Newsome | Rename tdata0--tdata2 to tdata1--tdata3. |
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2016-08-27 |
Andrew Waterman | Add (degenerate) performance counter facility |
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2016-08-26 |
Andrew Waterman | partially update spike to newer debug spec |
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2016-08-22 |
Tim Newsome | Implement address and data triggers. |
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2016-07-06 |
Andrew Waterman | Update to new PTE format |
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2016-06-18 |
Andrew Waterman | Merge sasid into sptbr |
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2016-06-09 |
Andrew Waterman | Add degenerate HW breakpoint implementation |
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2016-06-03 |
Tim Newsome | Keep DCSR_XDEBUGVER unsigned. |
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2016-05-24 |
Tim Newsome | New encoding.h for new CSR addresses. |
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2016-05-23 |
Tim Newsome | Change DCSR bits to match spec. |
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2016-05-23 |
Tim Newsome | Remove dependency on include file in my homedir. |
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2016-05-23 |
Tim Newsome | Software breakpoints sort of work. |
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2016-05-23 |
Tim Newsome | Remove unused code. |
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2016-05-23 |
Tim Newsome | Add dret. |
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2016-05-22 |
Andrew Waterman | Allow delegation of device interrupts |
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2016-05-02 |
Andrew Waterman | Remove MIPI; mip.MSIP bit is read-only |
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2016-05-01 |
Andrew Waterman | Remove SCRs; add padding after config string |
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2016-04-29 |
Andrew Waterman | Move much closer to new platform-M memory map |
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2016-04-28 |
Andrew Waterman | Remove MTIME[CMP]; add RTC device |
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2016-04-20 |
Andrew Waterman | Split ERET into URET, SRET, HRET, MRET |
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2016-04-06 |
Andrew Waterman | Remove non-standard uarch CSRs |
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2016-03-04 |
Andrew Waterman | Fix up interrupt delegation |
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2016-03-02 |
Andrew Waterman | Add counter-enable registers |
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2016-03-02 |
Andrew Waterman | WIP on priv spec v1.9 |
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2016-03-02 |
Andrew Waterman | New definitions of misa/marchid/mvendorid |
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2016-03-02 |
Andrew Waterman | implement PUM functionality |
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2016-03-02 |
Andrew Waterman | Use simpler MTVEC scheme |
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2016-03-02 |
Andrew Waterman | WIP on priv spec v1.9 |
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2015-11-13 |
Andrew Waterman | Generate device tree for target machine |
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2015-10-20 |
Andrew Waterman | Update to hopefully final RVC 1.9 encoding |
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2015-10-06 |
Andrew Waterman | RVC encoding tweak |
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2015-10-06 |
Andrew Waterman | more work towards RVC 1.8 |
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2015-10-02 |
Andrew Waterman | work towards rvc 1.8 |
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2015-09-09 |
Andrew Waterman | Improve instruction fetch |
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2015-09-04 |
Andrew Waterman | Move towards RVC v1.8 |
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2015-09-02 |
Andrew Waterman | Don't automatically run autoconf |
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2015-07-05 |
Andrew Waterman | New machine-mode timer facility |
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2015-06-01 |
Andrew Waterman | Add rest of RV32C instructions |
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2015-06-01 |
Andrew Waterman | New RV64C proposal |
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2015-05-15 |
Andrew Waterman | Merge pull request #20 from palmer-dabbelt/package |
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2015-05-14 |
Andrew Waterman | Fix VM, MIP encoding |
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2015-05-09 |
Andrew Waterman | Upgrade to privileged architecture 1.7 |
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2015-04-04 |
Andrew Waterman | Support setting ISA/subsets with --isa flag |
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2015-03-31 |
Andrew Waterman | Implement RVC draft |
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2015-03-27 |
Andrew Waterman | New virtual memory implementation (Sv39) |
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2015-03-17 |
Andrew Waterman | Merge [shm]call into ecall, [shm]ret into eret |
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2015-03-13 |
Andrew Waterman | Use hcall instead of mcall |
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2015-03-13 |
Andrew Waterman | Implement PTE referenced/dirty bits |
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2015-03-13 |
Andrew Waterman | Update to new privileged spec |
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2014-11-22 |
Yunsup Lee | Revert "Enable support for the four custom instructions" |
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2014-10-24 |
Yunsup Lee | Merge pull request #4 from arunthomas/custom_inst |
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2014-10-23 |
Arun Thomas | Enable support for the four custom instructions |
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2014-04-03 |
Stephen Twigg | Merge branch 'tm' |
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2014-04-03 |
Stephen Twigg | Sync encoding in opcodes |
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2014-03-18 |
Andrew Waterman | Support RV32 RDTIMEH/RDCYCLEH/RDINSTRETH |
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2014-03-12 |
Andrew Waterman | New FP encoding |
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2014-03-07 |
Andrew Waterman | Add fclass.{s|d} instructions |
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2014-02-15 |
Andrew Waterman | Renumber uarch CSRs into custom CSR space |
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2014-02-06 |
Yunsup Lee | commit missing definitions for uarch counters |
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2014-01-22 |
Andrew Waterman | Use auto-generated trap cause numbers |
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2014-01-21 |
Quan Nguyen | Merge branch 'confprec' |
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2014-01-14 |
Andrew Waterman | Improve performance for branchy code |
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