| 2011-06-12 |
Andrew Waterman | [xcc] minor performance tweaks |
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| 2011-06-12 |
Andrew Waterman | [xcc] tlb now stores host addresses |
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| 2011-06-11 |
Andrew Waterman | [xcc] cleaned up mmu code |
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| 2011-06-01 |
Andrew Waterman | [sim] fault on failed addr translations |
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| 2011-05-31 |
Andrew Waterman | [sim] minor sim cleanup |
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| 2011-05-29 |
Andrew Waterman | [sim,opcodes] improved sim build and run performance |
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| 2011-05-29 |
Andrew Waterman | [fesvr,xcc,sim] fixed multicore sim for akaros |
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| 2011-05-16 |
Andrew Waterman | [sim,pk] cleanups & initial virtual memory support |
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| 2011-05-14 |
Andrew Waterman | [sim] initial support for virtual memory |
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| 2011-05-06 |
Andrew Waterman | [sim] fixed building sim without cache simulators |
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| 2011-05-01 |
Andrew Waterman | [sim] hacked in a dcache simulator |
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| 2011-04-15 |
Andrew Waterman | [sim] added icache simulator (disabled by default) |
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| 2011-04-12 |
Andrew Waterman | [sim,pk] fixed minor pk bugs and trap codes |
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| 2011-04-12 |
Andrew Waterman | [xcc,sim,opcodes] more rvc instructions and bug fixes |
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| 2011-04-10 |
Andrew Waterman | [xcc, sim] added rvc insn c.li; misc fixes |
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| 2011-04-10 |
Andrew Waterman | [xcc,pk,sim,opcodes] added first RVC instruction |
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| 2010-10-05 |
Andrew Waterman | [xcc,sim] eliminated vectored traps |
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| 2010-09-11 |
Andrew Waterman | [sim, pk] cleaned up exception vectors and FP exc flags |
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| 2010-07-29 |
Andrew Waterman | [sim,xcc] Changed instruction format to RISC-V |
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| 2010-07-19 |
Andrew Waterman | Reorganized directory structure |
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projects / riscv-isa-sim.git / history