forgot to add submodules
[ieee754fpu.git] / src / add / fmul.py
2019-03-14 Luke Kenneth Casso... forgot to add submodules
2019-03-14 Luke Kenneth Casso... got rounding working again for fmul
2019-03-14 Luke Kenneth Casso... remove extra arg from old roundz function
2019-03-14 Luke Kenneth Casso... get roundz working again, needed for mul stage
2019-03-14 Luke Kenneth Casso... start to get fpmul back up and running
2019-03-14 Luke Kenneth Casso... replace copy of FPState with import of FPState
2019-03-13 Aleksandar KostovicStarted to update fmul.py to new conventions
2019-02-20 Aleksandar KostovicRemove coments with verilog code
2019-02-18 Luke Kenneth Casso... whoops, off-by-one in use of mw, in multiply_1 stage
2019-02-18 Luke Kenneth Casso... whoops, messing up on m_width *sigh*
2019-02-18 Luke Kenneth Casso... doh! use z mantissa width to specify product width.
2019-02-18 Luke Kenneth Casso... special cases, sign of zero and inf matters: a.s ^ b.s
2019-02-18 Luke Kenneth Casso... missed indentation of if statements in special cases
2019-02-18 Luke Kenneth Casso... of.guard, of.round, of.sticky - of is a class with...
2019-02-18 Luke Kenneth Casso... m.next not m.next +=
2019-02-18 Luke Kenneth Casso... whoops, self.width not self.m_width
2019-02-18 Luke Kenneth Casso... diff on div and mul shows corrections stage missed out
2019-02-18 Luke Kenneth Casso... use get_op functions, easier to do
2019-02-18 Luke Kenneth Casso... product in multiply, not tot (was from add)
2019-02-18 Luke Kenneth Casso... corrections in whitespace due to use of tabs
2019-02-18 Luke Kenneth Casso... mul needs FPNum mantissa to be 24-bit on a and b, set...
2019-02-17 Aleksandar KostovicFinished the module states and added __main__
2019-02-17 Aleksandar KostovicAdd more special cases to the module
2019-02-17 Aleksandar KostovicAdded comment to explain a case
2019-02-17 Aleksandar KostovicTranslated more of the special cases to nmigen
2019-02-17 Aleksandar KostovicTranslated some of the special cases to nmigen
2019-02-17 Aleksandar KostovicStarted to build module using functions instead plain...
2019-02-17 Aleksandar KostovicStarted to translate special cases
2019-02-17 Aleksandar KostovicDone unpack in nmigen
2019-02-17 Luke Kenneth Casso... convert to more general base classes, start support...
2019-02-16 Aleksandar KostovicFixed typo in get_b state
2019-02-16 Aleksandar KostovicDid get_b state in nmigen
2019-02-16 Aleksandar KostovicDid get_a state in nmigen
2019-02-16 Aleksandar KostovicMade a file and started to do porting from verilog...