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Implement program buffer preexec/postexec.
[riscv-isa-sim.git]
/
riscv
/
debug_module.h
2017-02-14
Tim Newsome
Implement program buffer preexec/postexec.
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2017-02-13
Tim Newsome
Abstract register read mostly working.
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2017-02-12
Tim Newsome
Fix stack overflow and support --rbb-port=0
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2017-02-11
Tim Newsome
Entering debug mode now jumps to "dynamic rom"
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2017-02-10
Tim Newsome
Implement hartstatus field.
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2017-02-09
Tim Newsome
Add writable ibuf and data registers.
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2017-02-09
Tim Newsome
Serve up a correct dmcontrol register.
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2017-02-07
Tim Newsome
OpenOCD does a dmi read and gets dummy value back.
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2016-05-23
Tim Newsome
Turn off debugging.
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2016-05-23
Tim Newsome
Software breakpoints sort of work.
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2016-05-23
Tim Newsome
Have Debug memory kind of working again.
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2016-05-23
Tim Newsome
Refactor how we track in-progress operations.
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2016-05-23
Tim Newsome
Fix store to clear debug interrupt.
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2016-05-23
Tim Newsome
Add debug_module bus device.
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