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Rename badaddr to tval
2017-11-27 Andrew WatermanRename badaddr to tval
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2017-11-27 Andrew WatermanRename sptbr to satp
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2017-11-27 Andrew WatermanSet tval to 0 on traps with no specified tval
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2017-11-10 Andrew WatermanRemove redundant U/S mode advertisement
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2017-11-10 Andrew WatermanH-mode no longer exists
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2017-11-10 Andrew WatermanMPP is now WARL
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2017-11-04 Andrew WatermanFix disassembly of c.li 0
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2017-11-03 Andrew WatermanMask medeleg correctly
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2017-11-02 Andrew WatermanDon't permit delegation of interrupts that M-mode should...
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2017-10-19 Andrew WatermanFix implementation of FMIN/FMAX NaN case
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2017-09-28 Andrew WatermanImplement Q extension
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2017-09-25 Andrew WatermanUpdate SoftFloat
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2017-06-30 Andrew WatermanRemove reference to H-mode in ECALL
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2017-06-07 Andrew WatermanForbid S-mode execution from user memory
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2017-06-05 Andrew WatermanConfigure should fail if device-tree-compiler is not...
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2017-05-25 Andrew WatermanminNum -> minimumNumber
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2017-05-14 Andrew WatermanMake C.LI/C.LUI trapping behavior match spec
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2017-05-05 Andrew WatermanUXL=SXL=MXL
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2017-05-05 Andrew WatermanTrap superpage PTEs when PPN LSBs are set
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2017-05-01 Andrew WatermanFix segfault when accessing bad memory addresses
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2017-05-01 Andrew WatermanSet default entry point from ELF
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2017-05-01 Andrew WatermanAdd option to set start pc
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2017-05-01 Andrew WatermanSupport more flexible main memory allocation
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2017-05-01 Andrew WatermanStore both host & target address in soft TLB
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2017-04-25 Andrew WatermanFMV.X.S/FMV.S.X -> FMV.X.W/FMV.W.X
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2017-04-25 Andrew WatermanRemove hret instruction
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2017-04-11 Andrew WatermanImplement new FP encoding
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2017-04-08 Andrew WatermanImplement vectored interrupt proposal
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2017-04-06 Andrew WatermanAdd --enable-misaligned option for misaligned ld/st...
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2017-04-01 Andrew WatermanUpdate LICENSE copyright date
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2017-03-28 Andrew WatermanSet badaddr=0 on illegal instruction traps
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2017-03-28 Andrew WatermanOn EBREAK, set badaddr to pc
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2017-03-27 Andrew WatermanSeparate page faults from physical memory access exceptions
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2017-03-25 Andrew WatermanDefault to 2 GiB of memory
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2017-03-23 Andrew WatermanRequire little-endian host
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2017-03-20 Andrew WatermanPUM -> SUM; expose MXR to S-mode
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2017-03-16 Andrew WatermanSimplify interrupt-stack discipline
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2017-03-13 Andrew WatermanImplement mstatus.TW, mstatus.TVM, and mstatus.TSR
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2017-03-07 Andrew WatermanDon't overload illegal instruction trap in interactive...
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2017-02-27 Andrew WatermanSv57 and Sv64 are not spec'd yet
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2017-02-25 Andrew WatermanNew counter enable scheme
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2017-02-21 Andrew Watermanserialize simulator on wfi
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2017-02-21 Andrew WatermanTake M-mode interrupts over S-mode interrupts
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2017-02-21 Andrew Watermanpermit MMIO loads to MSIP bit
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2017-02-19 Andrew WatermanMake HW setting of PTE A/D bits optional (by configure...
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2017-02-18 Andrew WatermanSpike uarch needs TLB flush after SPTBR write
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2017-02-15 Andrew Watermansfence.vm -> sfence.vma
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2017-02-08 Andrew WatermanEncode VM type in sptbr, not mstatus
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2017-02-03 Andrew WatermanFix interrupt delegation for coprocessors
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2017-02-02 Andrew WatermanFor FMIN(sNaN, x) and FMIN(qNaN, qNaN), return canonical NaN
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2017-02-02 Andrew WatermanSet xPIE=1 on xRET
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2017-01-08 Andrew WatermanOnly allow SIP.SSIP to be toggled if the interrupt...
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2017-01-08 Andrew WatermanMake SIP.STIP read-only
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2016-11-14 Andrew WatermanFix 32-bit host portability bug
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2016-11-10 Andrew WatermanAMOs should always return store faults, not load faults
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Simple-V augmented version of spike