2021-02-14 |
Luke Kenneth Casso... | add srcstep onto Vectorised GPRs in PowerDecoder2 |
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2021-02-13 |
Tobias Platen | forward microwatt mmu specific SPR: PID and PRTBL |
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2021-02-11 |
Luke Kenneth Casso... | comments in TestIssuer for SVP64PrefixDecoder |
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2021-02-04 |
Tobias Platen | pass SPR MicroOp to MMU function unit |
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2021-02-03 |
Luke Kenneth Casso... | nope - need it to be zero if not identified as svp64 |
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2021-02-03 |
Luke Kenneth Casso... | actually no need to mux in the svp64_rm, just the id... |
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2021-02-03 |
Luke Kenneth Casso... | add SVP64PowerDecoder, extracts svp64 remap if correctl... |
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2021-01-31 |
Luke Kenneth Casso... | remove sv_rm from PowerDecoder register decoders |
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2021-01-31 |
Luke Kenneth Casso... | move SVP64 Extra reg decoding into main PowerDecoder... |
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2021-01-30 |
Luke Kenneth Casso... | move CR in/out SVP64 EXTRA decoders into PowerDecoder |
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2021-01-30 |
Luke Kenneth Casso... | add SVP64 CR out extending to 7-bit in PowerDecoder2 |
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2021-01-30 |
Luke Kenneth Casso... | add SVP64 CR EXTRA field-extension, from 3-bit to 7... |
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2021-01-30 |
Luke Kenneth Casso... | extend CR registers in Decode2ToExecute1Type to 7 bit |
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2021-01-30 |
Luke Kenneth Casso... | add SVP64CRExtra class to PowerDecoder2, turns 3-bit... |
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2021-01-30 |
Luke Kenneth Casso... | split out SVEXTRA field selection/decoding into separat... |
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2021-01-30 |
Luke Kenneth Casso... | whoops update PowerDecoder2 svp64 comments, reg sizes... |
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2021-01-30 |
Luke Kenneth Casso... | add SVP64 EXTRA decoding to RB, RC and RT (out) in... |
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2021-01-30 |
Luke Kenneth Casso... | add first SVP64 7-bit register context decoder to Power... |
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2021-01-29 |
Luke Kenneth Casso... | add SVP64RM record to PowerDecoder2 |
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2021-01-29 |
Luke Kenneth Casso... | adjust how register copy/setup is done in PowerDecoder2 |
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2021-01-27 |
Tobias Platen | use SPR constants |
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2021-01-27 |
Luke Kenneth Casso... | whitespace and shortening of SPR MMU redirection in... |
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2021-01-26 |
Tobias Platen | [Bug 580] update comment above changed block |
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2021-01-26 |
Tobias Platen | [Bug 580] redirect MMU SPRs to the MMU |
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2020-10-06 |
Luke Kenneth Casso... | comments |
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2020-10-06 |
Luke Kenneth Casso... | skip Decode2ToOperand from PowerDecodeSubset |
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2020-10-06 |
Luke Kenneth Casso... | comment SRR1 mem.exception |
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2020-10-06 |
Luke Kenneth Casso... | add SRR1 setting for LDST memory exception trap |
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2020-10-06 |
Luke Kenneth Casso... | passing LDSTException over to Trap Pipeline |
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2020-10-06 |
Luke Kenneth Casso... | add LDSTException decode/handling in PowerDecoder2 |
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2020-09-26 |
Luke Kenneth Casso... | fix annoying alu test_pipe_caller bug, missing asmcode |
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2020-09-26 |
Luke Kenneth Casso... | make check of LDSTMode.update conditional in PowerDecoder2 |
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2020-09-08 |
Luke Kenneth Casso... | subset columns for PowerDecoder - bit of a mess (done... |
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2020-09-08 |
Luke Kenneth Casso... | create a special subset of Decoder Record for storing... |
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2020-09-08 |
Luke Kenneth Casso... | argh, somehow EINT check got moved out of if/elif block |
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2020-09-08 |
Luke Kenneth Casso... | capture trap / irq conditions in flags for debug purposes |
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2020-09-08 |
Luke Kenneth Casso... | pass in CoreState to PowerDecoder rather than eq a... |
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2020-09-08 |
Luke Kenneth Casso... | whoops trap address being set in wrong Decode2ExecuteTy... |
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2020-09-07 |
Luke Kenneth Casso... | use PowerDecoderSubsets for FUs, except for TRAP which... |
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2020-09-07 |
Luke Kenneth Casso... | make immediate decoding optional on-demand |
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2020-09-07 |
Luke Kenneth Casso... | bit of a big reorg of data structures |
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2020-09-07 |
Luke Kenneth Casso... | split out PowerDecode2 into PowerDecodeSubset |
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2020-09-07 |
Luke Kenneth Casso... | minor reorg on PowerDecoder |
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2020-09-06 |
Luke Kenneth Casso... | decoder immediate b split out to DecodeBImm |
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2020-09-06 |
Luke Kenneth Casso... | decoder immediate a split out to DecodeAImm |
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2020-09-06 |
Luke Kenneth Casso... | minor code-munge on SPR-to-FAST mapping |
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2020-09-06 |
Luke Kenneth Casso... | add comments for DEC / TB |
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2020-09-06 |
Luke Kenneth Casso... | move DEC and TB from StateRegs to FastRegs for several... |
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2020-09-06 |
Luke Kenneth Casso... | add DEC SPR to CoreState and PowerDecoder, activate... |
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2020-09-04 |
Luke Kenneth Casso... | adding option to include XICS external interrupts. |
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2020-09-02 |
Luke Kenneth Casso... | when mtocrf FXM is 0, the CR has to be set to CR7 |
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2020-09-02 |
Luke Kenneth Casso... | series of extensive modifications to fix long-standing... |
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2020-08-31 |
Luke Kenneth Casso... | add XER to fastregs and "construct" it in mfspr/mtspr |
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2020-08-30 |
Luke Kenneth Casso... | reversal of FXM mask for one-hot selection in OP_MTCR... |
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2020-08-29 |
Luke Kenneth Casso... | slowly morphing towards using an XER bit-field selector... |
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2020-08-29 |
Luke Kenneth Casso... | yep disable OE for MULH64/32 and EXTS and CNTZ |
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2020-08-29 |
Luke Kenneth Casso... | investigating CR mtocrf / mfocrf |
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2020-08-29 |
Luke Kenneth Casso... | CR FXM becomes a full mask. |
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2020-08-27 |
Cole Poirier | Merge branch 'master' of git.libre-soc.org:soc |
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2020-08-27 |
Luke Kenneth Casso... | incompatibility with POWER9 on mulhw/u due to lack... |
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2020-08-27 |
Luke Kenneth Casso... | overflow-enable does not occur on shift operations |
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2020-08-24 |
Cole Poirier | Merge branch 'master' of git.libre-soc.org:soc |
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2020-08-22 |
Luke Kenneth Casso... | rename invert_a to invert_in because logical inverts RB |
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2020-08-14 |
Luke Kenneth Casso... | move instruction decoder out of core |
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2020-08-14 |
Luke Kenneth Casso... | move regspec / rdflag decoding functions out of PowerDe... |
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2020-08-14 |
Luke Kenneth Casso... | reduce decoder pathways when exception occurs |
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2020-08-03 |
Luke Kenneth Casso... | pass state (MSR/PC) around between PowerDecode2, DMI... |
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2020-07-31 |
Luke Kenneth Casso... | reorg DecodeB in power_decoder2.py to sign-extend immed... |
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2020-07-22 |
Jacob Lifshay | Merge remote-tracking branch 'origin/master' |
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2020-07-22 |
Jacob Lifshay | format code |
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2020-07-21 |
Luke Kenneth Casso... | when running an exception (trap) after "reset" must... |
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2020-07-21 |
Luke Kenneth Casso... | add PC (CIA) to PowerDecode2 "state" for passing into... |
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2020-07-17 |
Jacob Lifshay | Merge branch 'master' of ssh://git.libre-riscv.org... |
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2020-07-17 |
Luke Kenneth Casso... | comment explaining why not to call self.trap in PowerDe... |
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2020-07-15 |
Luke Kenneth Casso... | simplify instr_is_priv |
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2020-07-15 |
Luke Kenneth Casso... | move traptype to soc.consts |
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2020-07-15 |
Luke Kenneth Casso... | move priv test to above illegal/trap test |
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2020-07-15 |
Luke Kenneth Casso... | minor reorg on PowerDecoder2, use switch/case rather... |
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2020-07-15 |
Luke Kenneth Casso... | comments on SPRmap done in PowerDecode2 |
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2020-07-15 |
Luke Kenneth Casso... | comments on SPRmap done in PowerDecode2 |
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2020-07-15 |
Luke Kenneth Casso... | use case statement in PowerDecode2 |
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2020-07-15 |
Luke Kenneth Casso... | select RA based on LDSTMode.update in PowerDecode2 |
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2020-07-15 |
Luke Kenneth Casso... | remove unused class XerBits |
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2020-07-14 |
Luke Kenneth Casso... | add in privileged instruction decision-making in PowerD... |
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2020-07-14 |
Luke Kenneth Casso... | comments on PowerDecode2 |
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2020-07-14 |
Luke Kenneth Casso... | add MSR to PowerDecoder2 |
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2020-07-12 |
Luke Kenneth Casso... | rename InternalOp to MicrOp |
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2020-07-12 |
Luke Kenneth Casso... | change CSV LD/ST update field to LDSTMode (support... |
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2020-07-12 |
Luke Kenneth Casso... | missed setting of link register on OP_BC in PowerDecoder2 |
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2020-07-11 |
Luke Kenneth Casso... | special test for mul hw to cope with ignoring OE flag |
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2020-07-08 |
Jacob Lifshay | Merge branch 'master' of ssh://git.libre-riscv.org... |
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2020-07-07 |
Luke Kenneth Casso... | sort-of got binary execution test working |
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2020-07-07 |
Luke Kenneth Casso... | whoops got Function.NONE test wrong in PowerDecode2 |
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2020-07-07 |
Luke Kenneth Casso... | debugging termination (OP_ATTN) |
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2020-07-06 |
Luke Kenneth Casso... | add mtmsr internal op |
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2020-07-05 |
Luke Kenneth Casso... | set up a trap function for microcode override |
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2020-07-05 |
Luke Kenneth Casso... | big reorg on PowerDecoder2, actually Decode2Execute1Type |
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2020-07-05 |
Luke Kenneth Casso... | sigh read and write xer detection, fix spr and trap... |
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2020-07-05 |
Luke Kenneth Casso... | move valid signal out of Decode2ToExecute1Type and... |
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2020-07-05 |
Luke Kenneth Casso... | remap SPR PowerISA numbers to internal SPR enum |
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