| 2018-04-05 |
Prashanth Mundkur | Allow querying the mmu configuration chosen during... |
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| 2018-03-16 |
Andrew Waterman | Merge branch 'deepsrc-b_fix_issue183' |
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| 2018-03-08 |
Tim Newsome | Merge pull request #177 from riscv/debug_auth |
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| 2018-03-06 |
Prashanth Mundkur | Narrow the interface used by the processors and memory... |
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| 2018-03-01 |
Tim Newsome | Merge pull request #173 from riscv/no_progbuf3 |
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| 2018-02-21 |
Andrew Waterman | Don't allow 32-bit instructions to take up multiple... |
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| 2017-11-27 |
Andrew Waterman | Rename badaddr to tval |
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| 2017-11-27 |
Andrew Waterman | Rename sptbr to satp |
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| 2017-11-16 |
Andrew Waterman | Merge pull request #156 from p12nGH/noncontiguous_harts |
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| 2017-10-11 |
Andrew Waterman | Merge pull request #129 from riscv/q-extension |
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| 2017-09-28 |
Andrew Waterman | Implement Q extension |
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| 2017-05-17 |
Palmer Dabbelt | Merge remote-tracking branch 'origin/priv-1.10' |
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| 2017-05-16 |
Palmer Dabbelt | Merge remote-tracking branch 'origin/debug-0.13' into... |
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| 2017-05-01 |
Andrew Waterman | Store both host & target address in soft TLB |
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| 2017-04-17 |
Megan Wachs | Merge remote-tracking branch 'origin/priv-1.10' into... |
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| 2017-04-06 |
Andrew Waterman | Add --enable-misaligned option for misaligned ld/st... |
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| 2017-03-27 |
Andrew Waterman | Separate page faults from physical memory access exceptions |
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| 2017-02-08 |
Andrew Waterman | Encode VM type in sptbr, not mstatus |
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| 2016-11-14 |
Andrew Waterman | Fix 32-bit host portability bug |
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| 2016-11-10 |
Andrew Waterman | AMOs should always return store faults, not load faults |
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| 2016-09-02 |
Andrew Waterman | Merge pull request #62 from riscv/trigger |
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| 2016-09-02 |
Tim Newsome | Merge branch 'master' into trigger |
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| 2016-09-02 |
Tim Newsome | Support triggers on TLB misses. |
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| 2016-09-01 |
Tim Newsome | Theoretically support trigger timing. |
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| 2016-08-22 |
Tim Newsome | Implement address and data triggers. |
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| 2016-07-06 |
Andrew Waterman | Update to new PTE format |
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| 2016-06-23 |
Andrew Waterman | Don't use I$ in debug mode |
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| 2016-05-23 |
Tim Newsome | Use fence.i in Debug ROM. |
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| 2016-05-23 |
Tim Newsome | gdb can attach and read the PC: |
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| 2016-05-23 |
Tim Newsome | Add debug_module bus device. |
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| 2016-04-29 |
Andrew Waterman | Move much closer to new platform-M memory map |
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| 2016-03-02 |
Andrew Waterman | implement PUM functionality |
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| 2015-09-25 |
Andrew Waterman | Refactor memory access code; add MMIO support |
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| 2015-09-25 |
Andrew Waterman | Use enum instead of two bools to denote memory access... |
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| 2015-09-09 |
Andrew Waterman | Improve instruction fetch |
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| 2015-07-11 |
Andrew Waterman | Merge pull request #27 from sbeamer/master |
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| 2015-07-11 |
Scott Beamer | fix clang compile error |
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| 2015-04-26 |
Andrew Waterman | Fix I$ simulator hit count |
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| 2015-04-04 |
Andrew Waterman | Support setting ISA/subsets with --isa flag |
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| 2015-03-31 |
Andrew Waterman | Implement RVC draft |
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| 2015-03-27 |
Andrew Waterman | New virtual memory implementation (Sv39) |
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| 2015-03-14 |
Andrew Waterman | Don't set dirty/referenced bits w/o permission |
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| 2015-03-13 |
Andrew Waterman | Implement PTE referenced/dirty bits |
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| 2015-01-03 |
Andrew Waterman | Require 4-byte instruction alignment until RVC is reimp... |
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| 2015-01-03 |
Andrew Waterman | On misaligned fetch, set EPC to target, not branch... |
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| 2015-01-02 |
Andrew Waterman | Reduce dependences on auto-generated code |
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| 2014-12-05 |
Andrew Waterman | Support 2/4/6/8-byte instructions |
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| 2014-02-14 |
Andrew Waterman | Fix I$ simulator not making forward progress |
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| 2014-01-21 |
Quan Nguyen | Merge branch 'confprec' |
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| 2014-01-14 |
Andrew Waterman | Improve performance for branchy code |
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| 2013-12-17 |
Andrew Waterman | Speed things up quite a bit |
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| 2013-09-11 |
Andrew Waterman | Implement zany immediates |
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| 2013-08-12 |
Andrew Waterman | Instructions are no longer member functions |
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| 2013-07-29 |
Andrew Waterman | Don't flush TLB on PTBR writes (only FATC) |
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| 2013-07-27 |
Andrew Waterman | New supervisor mode |
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| 2013-07-27 |
Andrew Waterman | Remove more vector stuff |
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| 2013-07-26 |
Andrew Waterman | Rip out RVC for now |
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| 2013-07-26 |
Andrew Waterman | Generate instruction decoder dynamically |
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| 2013-03-30 |
Andrew Waterman | add load-reserved/store-conditional instructions |
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| 2013-03-26 |
Andrew Waterman | add BSD license |
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| 2013-03-26 |
Andrew Waterman | truncate effective addresses in rv32 |
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| 2013-02-15 |
Andrew Waterman | don't store host pointers in soft TLB |
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| 2013-02-13 |
Andrew Waterman | clean up fetch-execute loop a bit |
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| 2013-02-13 |
Andrew Waterman | add I$/D$/L2$ simulators |
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| 2012-01-24 |
Andrew Waterman | check that virtual addresses are sign-extended |
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| 2012-01-23 |
Andrew Waterman | disentangle decode.h from other headers |
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| 2011-11-01 |
Andrew Waterman | Fixed tight coupling of host and target page size |
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| 2011-10-27 |
Andrew Waterman | changed page size to 8KB |
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| 2011-06-20 |
Andrew Waterman | temporary undoing of renaming |
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| 2011-06-13 |
Andrew Waterman | [sim] renamed to riscv-isa-run |
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| 2011-06-12 |
Andrew Waterman | [xcc] minor performance tweaks |
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| 2011-06-12 |
Andrew Waterman | [xcc] tlb now stores host addresses |
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| 2011-06-11 |
Andrew Waterman | [xcc] cleaned up mmu code |
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| 2011-06-01 |
Andrew Waterman | [sim] fault on failed addr translations |
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| 2011-05-31 |
Andrew Waterman | [sim] minor sim cleanup |
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| 2011-05-29 |
Andrew Waterman | [sim,opcodes] improved sim build and run performance |
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| 2011-05-29 |
Andrew Waterman | [fesvr,xcc,sim] fixed multicore sim for akaros |
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| 2011-05-16 |
Andrew Waterman | [sim,pk] cleanups & initial virtual memory support |
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| 2011-05-14 |
Andrew Waterman | [sim] initial support for virtual memory |
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| 2011-05-06 |
Andrew Waterman | [sim] fixed building sim without cache simulators |
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| 2011-05-01 |
Andrew Waterman | [sim] hacked in a dcache simulator |
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| 2011-04-15 |
Andrew Waterman | [sim] added icache simulator (disabled by default) |
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| 2011-04-12 |
Andrew Waterman | [sim,pk] fixed minor pk bugs and trap codes |
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| 2011-04-12 |
Andrew Waterman | [xcc,sim,opcodes] more rvc instructions and bug fixes |
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| 2011-04-10 |
Andrew Waterman | [xcc, sim] added rvc insn c.li; misc fixes |
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| 2011-04-10 |
Andrew Waterman | [xcc,pk,sim,opcodes] added first RVC instruction |
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| 2010-10-05 |
Andrew Waterman | [xcc,sim] eliminated vectored traps |
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| 2010-09-11 |
Andrew Waterman | [sim, pk] cleaned up exception vectors and FP exc flags |
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| 2010-07-29 |
Andrew Waterman | [sim,xcc] Changed instruction format to RISC-V |
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| 2010-07-19 |
Andrew Waterman | Reorganized directory structure |
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projects / riscv-isa-sim.git / history