| 2017-11-16 |
Andrew Waterman | Merge pull request #156 from p12nGH/noncontiguous_harts |
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| 2017-11-15 |
Gleb Gagarin | Support for non-contiguous hartids |
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| 2017-11-03 |
Palmer Dabbelt | Merge pull request #151 from riscv/htif_dts |
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| 2017-11-03 |
Palmer Dabbelt | Put HTIF in the device tree |
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| 2017-06-14 |
Palmer Dabbelt | Merge pull request #113 from riscv/debug_readme |
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| 2017-06-14 |
Tim Newsome | Support 64-bit start PCs in reset vector. |
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| 2017-05-17 |
Palmer Dabbelt | Merge remote-tracking branch 'origin/priv-1.10' |
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| 2017-05-16 |
Palmer Dabbelt | Merge remote-tracking branch 'origin/debug-0.13' into... |
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| 2017-05-01 |
Andrew Waterman | Fix segfault when accessing bad memory addresses |
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| 2017-05-01 |
Andrew Waterman | Set default entry point from ELF |
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| 2017-05-01 |
Andrew Waterman | Add option to set start pc |
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| 2017-05-01 |
Andrew Waterman | Support more flexible main memory allocation |
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| 2017-04-17 |
Megan Wachs | Merge remote-tracking branch 'origin/priv-1.10' into... |
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| 2017-03-30 |
Wesley W. Terpstra | fdt: move interrupt controller into its own node |
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| 2017-03-25 |
Andrew Waterman | Default to 2 GiB of memory |
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| 2017-03-22 |
Wesley W. Terpstra | riscv: replace rtc device with a real clint implementation |
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| 2017-03-22 |
Wesley W. Terpstra | sim: declare cores as interrupt-controllers for clint |
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| 2017-03-21 |
Wesley W. Terpstra | bootrom: set a0 to hartid and a1 to dtb before boot |
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| 2017-03-21 |
Wesley W. Terpstra | configstring: rename variables to dts |
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| 2017-03-21 |
Wesley W. Terpstra | bootrom: include compiled dtb |
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| 2017-03-21 |
Wesley W. Terpstra | sim: create DTS instead of config string |
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| 2017-02-13 |
Tim Newsome | Abstract register read mostly working. |
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| 2017-02-10 |
Tim Newsome | Implement hartstatus field. |
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| 2017-02-03 |
Tim Newsome | OpenOCD connects, and sends some data that we receive. |
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| 2016-12-17 |
Stefan O'Rear | Use correct format codes for reg_t and size_t |
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| 2016-09-02 |
Andrew Waterman | Merge pull request #62 from riscv/trigger |
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| 2016-09-02 |
Tim Newsome | Merge branch 'master' into trigger |
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| 2016-08-29 |
Tim Newsome | Fix indent. |
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| 2016-06-23 |
Andrew Waterman | Remove legacy HTIF; implement HTIF directly |
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| 2016-05-23 |
Tim Newsome | Make -H halt the core right out of reset. |
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| 2016-05-23 |
Tim Newsome | Have Debug memory kind of working again. |
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| 2016-05-23 |
Tim Newsome | Add debug_module bus device. |
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| 2016-05-23 |
Tim Newsome | Make sure to translate Debug RAM addresses also. |
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| 2016-05-23 |
Tim Newsome | Can jump to and execute Debug ROM. |
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| 2016-05-23 |
Tim Newsome | Gutting direct-access gdb. |
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| 2016-05-23 |
Tim Newsome | Add --gdb-port |
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| 2016-05-23 |
Tim Newsome | Flush icache when using swbps and report to gdb. |
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| 2016-05-23 |
Tim Newsome | Add -H to start halted. |
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| 2016-05-23 |
Tim Newsome | Listen on a socket for gdb to connect to. |
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| 2016-05-02 |
Andrew Waterman | Add back IPI support |
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| 2016-05-02 |
Andrew Waterman | Remove tohost/fromhost registers |
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| 2016-05-01 |
Andrew Waterman | Remove SCRs; add padding after config string |
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| 2016-04-29 |
Andrew Waterman | Move much closer to new platform-M memory map |
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| 2016-04-28 |
Andrew Waterman | Remove MTIME[CMP]; add RTC device |
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| 2016-03-02 |
Andrew Waterman | Use RV config string rather than FDT |
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| 2016-03-02 |
Andrew Waterman | New definitions of misa/marchid/mvendorid |
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| 2016-03-02 |
Andrew Waterman | Set default RV32 RAM size to 4 GiB - 256 MiB |
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| 2015-11-13 |
Andrew Waterman | Generate device tree for target machine |
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| 2015-09-25 |
Andrew Waterman | Refactor memory access code; add MMIO support |
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| 2015-08-06 |
Andrew Waterman | Merge pull request #29 from pmundkur/devel |
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| 2015-08-06 |
Prashanth Mundkur | Add an option (-l) to display a log of execution in... |
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| 2015-06-01 |
Andrew Waterman | Use single, shared real-time counter |
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| 2015-04-04 |
Andrew Waterman | Support setting ISA/subsets with --isa flag |
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| 2014-08-15 |
Christopher Celio | Added PC histogram option. |
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| 2014-01-21 |
Quan Nguyen | Merge branch 'confprec' |
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| 2014-01-14 |
Andrew Waterman | Improve performance for branchy code |
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| 2013-11-05 |
Albert Ou | Merge branch 'master' of github.com:ucb-bar/riscv-isa... |
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| 2013-10-29 |
Andrew Waterman | Pass target machine's return code back to OS |
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| 2013-10-19 |
Yunsup Lee | refactor disassembler, and add hwacha disassembler |
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| 2013-09-23 |
Andrew Waterman | Fix Scott's deadlock |
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| 2013-09-11 |
Andrew Waterman | Implement zany immediates |
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| 2013-09-10 |
Andrew Waterman | Don't tick HTIF as often |
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| 2013-08-13 |
Andrew Waterman | Implement RoCC and add a dummy RoCC |
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| 2013-08-12 |
Andrew Waterman | Instructions are no longer member functions |
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| 2013-07-22 |
Andrew Waterman | Add xspike program |
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| 2013-07-20 |
Andrew Waterman | Use calloc to allocate target memory |
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| 2013-07-13 |
Andrew Waterman | Eliminate infinite loop in debug mode |
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| 2013-07-13 |
Andrew Waterman | Exit cleanly from debug console |
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| 2013-07-13 |
Andrew Waterman | Favor procs.size() over num_cores() |
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| 2013-03-30 |
Andrew Waterman | add load-reserved/store-conditional instructions |
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| 2013-03-26 |
Andrew Waterman | add BSD license |
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| 2013-03-26 |
Andrew Waterman | add missing #include |
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| 2013-02-13 |
Andrew Waterman | make HTIF interactions deterministic; fix race |
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| 2013-01-26 |
Andrew Waterman | change htif to link against libfesvr |
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| 2012-05-16 |
Andrew Waterman | fix htif interaction with interactive mode |
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| 2012-05-09 |
Andrew Waterman | per-core tohost/fromhost registers |
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| 2012-03-24 |
Andrew Waterman | new supervisor mode |
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| 2012-02-09 |
Yunsup Lee | initialize tohost and fromhost |
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| 2012-02-01 |
Andrew Waterman | poll HTIF occasionally |
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| 2011-11-11 |
Andrew Waterman | Changed supervisor mode |
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| 2011-10-19 |
Yunsup Lee | Merge branch 'master' of github.com:ucb-bar/riscv-isa-sim |
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| 2011-10-19 |
Yunsup Lee | yunsup made this fix..ask him |
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| 2011-06-27 |
Andrew Waterman | Builds and runs on Mac OS 10.6.7 |
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| 2011-06-20 |
Andrew Waterman | temporary undoing of renaming |
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| 2011-06-13 |
Andrew Waterman | [sim] renamed to riscv-isa-run |
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| 2011-06-11 |
Andrew Waterman | [xcc] cleaned up mmu code |
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| 2011-05-29 |
Andrew Waterman | [fesvr,xcc,sim] fixed multicore sim for akaros |
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| 2011-05-01 |
Andrew Waterman | [sim] hacked in a dcache simulator |
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| 2011-04-17 |
Andrew Waterman | [sim] added "str" debug command |
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| 2011-04-15 |
Andrew Waterman | [sim] added icache simulator (disabled by default) |
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| 2011-04-10 |
Yunsup Lee | [sim] add vt stuff |
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| 2011-03-25 |
Andrew Waterman | [xcc,pk,opcodes,sim] updated encoding/insn names |
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| 2011-01-19 |
Andrew Waterman | [opcodes, sim, xcc] made *w insns illegal in RV32 |
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| 2010-12-27 |
Andrew Waterman | [sim] fixed some compiler warnings |
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| 2010-11-22 |
Andrew Waterman | [xcc, sim, pk] link register is now x1 |
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| 2010-09-09 |
Andrew Waterman | Merge branch 'master' of /project/eecs/parlab/git/proje... |
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| 2010-09-08 |
Yunsup Lee | [sim] add while to interactive_until |
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| 2010-09-08 |
Yunsup Lee | [sim] change applink for tohost/fromhost |
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| 2010-09-07 |
Andrew Waterman | [sim] fixed bug in msub.d; added ability to print FPRs... |
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| 2010-08-10 |
Andrew Waterman | [sim] removed unused elf loader |
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