Compress log output of jump-to-self loops.
[riscv-isa-sim.git] / riscv / processor.cc
2017-02-18 Tim NewsomeCompress log output of jump-to-self loops.
2017-02-13 Tim NewsomeAbstract register read mostly working.
2017-02-11 Tim NewsomeEntering debug mode now jumps to "dynamic rom"
2017-02-10 Tim NewsomeRemove gdbserver support.
2017-01-08 Andrew WatermanOnly allow SIP.SSIP to be toggled if the interrupt...
2017-01-08 Andrew WatermanMake SIP.STIP read-only
2016-10-10 Andrew WatermanDon't force load trigger timing to After
2016-09-29 Tim NewsomeUpdate trigger behavior. (#70)
2016-09-10 Andrew Watermanallow MAFDC bits in MISA to be modified
2016-09-02 Andrew WatermanMerge pull request #62 from riscv/trigger
2016-09-02 Tim NewsomeMerge branch 'master' into trigger
2016-09-01 Tim NewsomeTheoretically support trigger timing.
2016-08-31 Tim NewsomeRename tdata[0-2] to tdata[1-3].
2016-08-29 Tim NewsomeRename tdata0--tdata2 to tdata1--tdata3.
2016-08-27 Andrew WatermanAdd (degenerate) performance counter facility
2016-08-26 Andrew WatermanAllow reads from tdrdata registers
2016-08-26 Andrew Watermanpartially update spike to newer debug spec
2016-08-26 Andrew WatermanFix spike interactive (-d) mode
2016-08-23 Andrew Watermanremove HWBPCOUNT field of DCSR
2016-08-22 Tim NewsomeImplement address and data triggers.
2016-08-17 Andrew WatermanAllow mstatus.MPP to store bad values; instead, validat...
2016-07-28 Tim NewsomeAdd support for virtual priv register. (#59)
2016-07-22 Andrew WatermanSet U bit in misa register
2016-07-12 Andrew WatermanDon't treat RVC NOP as illegal instruction
2016-07-06 Andrew WatermanUpdate to new PTE format
2016-06-29 Andrew WatermanDisassemble RVC instructions based on XLEN
2016-06-23 Andrew WatermanRemove legacy HTIF; implement HTIF directly
2016-06-23 Andrew WatermanFix paddr_bits computation prior to VM setup
2016-06-18 Andrew WatermanMerge sasid into sptbr
2016-06-09 Andrew WatermanTrap on tdrdata registers when tdrselect[XLEN-1]=0
2016-06-09 Andrew WatermanAdd degenerate HW breakpoint implementation
2016-05-23 Tim NewsomeTurn off debugging.
2016-05-23 Tim NewsomeTell gdb we can handle large packets.
2016-05-23 Tim NewsomeExceptions in Debug Mode don't update any regs.
2016-05-23 Tim NewsomeRemove already-implemented TODO.
2016-05-23 Tim NewsomeImplement ebreak[mhsu].
2016-05-23 Tim NewsomeRemove dependency on include file in my homedir.
2016-05-23 Tim NewsomeMake -H halt the core right out of reset.
2016-05-23 Tim NewsomeHalt when gdb user hits ^C.
2016-05-23 Tim NewsomeSingle step appears to work.
2016-05-23 Tim NewsomeFix off-by-two in general read registers.
2016-05-23 Tim NewsomeRemove unused code.
2016-05-23 Tim NewsomeAdd dret.
2016-05-23 Tim NewsomeImplement single memory read access.
2016-05-23 Tim NewsomeExceptions in Debug Mode, stay in Debug Mode.
2016-05-23 Tim NewsomeContinue works well enough for DebugTest.test_exit
2016-05-23 Tim NewsomeRefactor how we track in-progress operations.
2016-05-23 Tim Newsomeprocessor_t unfriends gdbserver_t.
2016-05-23 Tim NewsomeAdd debug_module bus device.
2016-05-23 Tim NewsomeCan jump to and execute Debug ROM.
2016-05-23 Tim NewsomeWhen gdb connects, jump to Debug ROM and segfault.
2016-05-23 Tim NewsomeGutting direct-access gdb.
2016-05-23 Tim NewsomeAdd writing to DCSR, DPC, DSCRATCH.
2016-05-23 Tim NewsomeOnly halt on ebreak if a debugger is attached.
2016-05-23 Tim NewsomeFlush icache when using swbps and report to gdb.
2016-05-23 Tim NewsomeSoftware breakpoints seem to work.
2016-05-23 Tim NewsomeLooks like single step works.
2016-05-23 Tim NewsomeNow you can halt/continue from gdb.
2016-05-22 Andrew WatermanAllow delegation of device interrupts
2016-05-02 Andrew WatermanAdd back IPI support
2016-05-02 Andrew WatermanRemove MIPI; mip.MSIP bit is read-only
2016-05-02 Andrew WatermanRemove tohost/fromhost registers
2016-05-01 Andrew WatermanInitialize mtvec to DEFAULT_MTVEC
2016-05-01 Andrew WatermanRemove SCRs; add padding after config string
2016-04-29 Andrew WatermanMove much closer to new platform-M memory map
2016-04-28 Andrew WatermanRemove MTIME[CMP]; add RTC device
2016-04-06 Andrew WatermanRemove non-standard uarch CSRs
2016-03-17 Andrew WatermanUpdate definition of base field in misa register
2016-03-04 Andrew WatermanFix up interrupt delegation
2016-03-02 Andrew WatermanAdd counter-enable registers
2016-03-02 Andrew WatermanWIP on priv spec v1.9
2016-03-02 Andrew WatermanNew definitions of misa/marchid/mvendorid
2016-03-02 Andrew Watermanimplement PUM functionality
2016-03-02 Andrew Watermansptbr now a holds a PPN, not an address
2016-03-02 Andrew WatermanUse simpler MTVEC scheme
2016-03-02 Andrew WatermanZero-extend all CSR writes
2016-03-02 Andrew WatermanFix ERET serialization strategy
2016-03-02 Andrew WatermanWIP on priv spec v1.9
2016-01-13 Andrew Watermandon't ignore data value when writing MIPI
2015-11-13 Andrew WatermanGenerate device tree for target machine
2015-10-26 Andrew WatermanFix histogram for RVC
2015-09-11 Andrew WatermanSimplify register_base_instructions
2015-09-11 Andrew WatermanInitialize mstatus.prv1/prv2 to U, not S
2015-09-11 Andrew WatermanSupport 'G' in ISA strings
2015-09-09 Andrew WatermanImprove instruction fetch
2015-07-30 Christopher CelioAdded error message when trying to use histogram
2015-07-05 Andrew WatermanNew machine-mode timer facility
2015-06-01 Andrew WatermanUse single, shared real-time counter
2015-06-01 Andrew WatermanExecute exactly the # of insns passed to step()
2015-06-01 Andrew WatermanFix performance bug when CSR accesses are common
2015-06-01 Andrew WatermanTake interrupts as soon as interrupts are enabled
2015-05-09 Andrew WatermanUpgrade to privileged architecture 1.7
2015-04-30 Andrew WatermanFix commit log for CSR instructions
2015-04-04 Andrew WatermanCheck for F extension when accessing FCSR
2015-04-04 Andrew WatermanSupport setting ISA/subsets with --isa flag
2015-03-31 Andrew WatermanAllow writing mstatus.fs even if FPU isn't present
2015-03-27 Andrew WatermanSerialize counters without throwing C++ exceptions
2015-03-26 Andrew WatermanUpdate state.pc on every instruction
2015-03-17 Yunsup Leebugfix, mbadaddr should be writable
2015-03-13 Andrew WatermanUpdate to new privileged spec
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